Loop parallelization automation for graphics processing units
dc.contributor.author | Doroshenko, Anatoliy | |
dc.contributor.author | Beketov, Olexii | |
dc.contributor.author | Yatsenko, Olena | |
dc.date.accessioned | 2023-04-18T09:12:48Z | |
dc.date.available | 2023-04-18T09:12:48Z | |
dc.date.issued | 2020 | |
dc.description.abstract | A technology that allows extending GPU capabilities to deal with data volumes that outfit internal GPU’s memory capacity is proposed. It involves loop tiling and data serialization and can be applied to utilize clusters consisting of several GPUs. Applicability criterion is specified and a semi-automatic proof-of-concept software tool is implemented. The experiment to demonstrate the feasibility of the proposed technology is described. | uk |
dc.format.pagerange | Pp. 15-25 | uk |
dc.identifier.citation | Doroshenko, A. Loop parallelization automation for graphics processing units / Doroshenko Anatoliy, Beketov Olexii, Yatsenko Olena // Information, Computing and Intelligent systems. – 2020. – No. 1. – Pp. 15–25. – Bibliogr.: 14 ref. | uk |
dc.identifier.doi | https://doi.org/10.20535/2708-4930.1.2020.216044 | |
dc.identifier.orcid | 0000-0002-8435-1451 | uk |
dc.identifier.orcid | 0000-0003-4715-5053 | uk |
dc.identifier.orcid | 0000-0002-4700-6704 | uk |
dc.identifier.uri | https://ela.kpi.ua/handle/123456789/54663 | |
dc.language.iso | en | uk |
dc.publisher | National Technical University of Ukraine "Igor Sikorsky Kyiv Polytechnic Institute" | uk |
dc.publisher.place | Kyiv | uk |
dc.relation.ispartof | Information, Computing and Intelligent systems, No. 1 | uk |
dc.subject | CUDA | uk |
dc.subject | general-purpose computing on graphics processing units | uk |
dc.subject | loop optimization | uk |
dc.subject | parallelization methods | uk |
dc.subject.udc | 004.4’24 | uk |
dc.title | Loop parallelization automation for graphics processing units | uk |
dc.type | Article | uk |
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