Power Analysis Template Attacks on AES-128 Hardware Implementations and Protection Against Them
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Дата
2023
Науковий керівник
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Видавець
Igor Sikorsky Kyiv Polytechnic Institute
Анотація
The purpose of this work is to research AES-128 power analysis template attack and propose a practical way to mitigate such kind of side-channel attacks. The research includes a review of power analysis side-channel attacks, an experiment with the collection of Atmega328PU chip power samples using Hantek 6022BE oscilloscope, processing collected data and modeling – building statistical template of the device and analyzing parameters of the side-channel attack. The work is focused on preparation and carrying out the experiment. The experimental bench layout and procedures of collecting and processing the data are considered in details. The result of this work is the confirmation of the effectiveness of power analysis template attacks on AES-128 for Arduino Uno hardware, and a mechanism for mitigating such kind of attacks on the particular hardware and software implementation. Research materials described in the current work could be used for developing another side-channel template attack mitigation mechanisms for other cryptographic implementations.
Опис
Ключові слова
Cryptanalysis, side-channel attacks, power analysis, SPA, DPA, template attacks, traces, samples, AES-128
Бібліографічний опис
Dehtyariov, A. Power Analysis Template Attacks on AES-128 Hardware Implementations and Protection Against Them / Andrii Dehtyariov, Mykola Graivoronskyi // Theoretical and Applied Cybersecurity : scientific journal. – 2023. – Vol. 5, Iss. 1. – Pp. 5–18. – Bibliogr. 19 ref.